ARM Cortex-A35 Technical Reference Manual page 654

EL2 handling, [11:8]
EL1 handling, [7:4]
EL0 handling, [3:0]
The EDPFR[31:0] can be accessed through the external debug interface, offset
The EDPFR[63:32] can be accessed through the external debug interface, offset
100236_0100_00_en
EL3 exception handling:
Instructions can be executed at EL3 in AArch64 or AArch32 state.
0x2
EL2 exception handling:
Instructions can be executed at EL2 in AArch64 or AArch32 state.
0x2
EL1 exception handling. The possible values are:
Instructions can be executed at EL1 in AArch64 or AArch32 state.
0x2
EL0 exception handling. The possible values are:
Instructions can be executed at EL0 in AArch64 or AArch32 state.
0x2
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C8.6 External Debug Processor Feature Register
reserved.
Non-Confidential
C8 Memory-mapped debug registers
.
0xD20
.
0xD24
C8-654