ARM Cortex-A35 Technical Reference Manual page 855

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A.6
Generic Timer signals
The processor uses a standard set of signals for the Generic Timer.
Signal
nCNTHPIRQ[CN:0]
nCNTPNSIRQ[CN:0] Output
nCNTPSIRQ[CN:0]
nCNTVIRQ[CN:0]
CNTCLKEN
CNTVALUEB[63:0]
Related information
A2.4 About the Generic Timer on page A2-47
100236_0100_00_en
Direction Description
Output
Hypervisor physical timer event.
Non-secure physical timer event.
Output
Secure physical timer event.
Output
Virtual physical timer event.
Input
Counter clock enable.
This clock enable must be asserted one cycle before the CNTVALUEB bus.
Input
Global system counter value in binary format.
Copyright © 2015–2017, 2019 Arm Limited or its affiliates. All rights
reserved.
Non-Confidential
A Signal Descriptions
A.6 Generic Timer signals
Table A-7 Generic Timer signals
Appx-A-855

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