ARM Cortex-A35 Technical Reference Manual page 454

CopDbg, [3:0]
To access the ID_DFR0_EL1:
MRS <Xt>, ID_DFR0_EL1 ; Read ID_DFR0_EL1 into Xt
Register access is encoded as follows:
100236_0100_00_en
Indicates support for coprocessor-based Secure debug model:
Processor supports v8 Debug architecture, with CP14 access.
0x6
Indicates support for coprocessor-based debug model:
Processor supports v8 Debug architecture, with CP14 access.
0x6
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B2.56 AArch32 Debug Feature Register 0, EL1
Table B2-48 ID_DFR0_EL1 access encoding
reserved.
Non-Confidential
B2 AArch64 system registers
op0 op1 CRn CRm op2
1111 000 0000 0001 010
B2-454