Gpio Register Summary - Freescale Semiconductor 56F800 User Manual

Address Offset
Base + $0
Base + $1
Base + $2
Base + $3
Base + $4
Base + $5
Base + $6
Base + $7
Base + $8
Each GPIO module has nine, 8-bit registers provided in
Freescale Semiconductor
Table 8-6. GPIO Register Summary
Register
Register Name
Acronym
GPIOX_PUR Pull-Up Enable Register
GPIOX_DR Data Register
GPIOX_DDR Data Direction Register
GPIOX_PER Peripheral Enable Register
GPIOX_IAR Interrupt Assert Register
GPIOX_IENR Interrupt Enable Register
GPIOX_IPOLR Interrupt Polarity Register
GPIOX_IPR Interrupt Pending Register
GPIOX_IESR Interrupt Edge-Sensitive Register
General Purpose Input/Output (GPIO), Rev. 3
Access Type
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Figure 8-5.
Register Definitions
Register
Location
Section 8.8.1
Section 8.8.2
Section 8.8.3
Section 8.8.4
Section 8.8.5
Section 8.8.6
Section 8.8.7
Section 8.8.8
Section 8.8.9
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