Freescale Semiconductor 56F800 User Manual page 550

Application:
ADC
arch.h: ArchIO.Adc.DisableReg (827 only)
registers.h: ArchIO_DisableReg (827 only)
ADC Sample
Disable Register
(ADSDIS)
ADC_BASE+$9
C
Reserved Bits
56
ADC Sample Disable Registers (ADSDIS)
Bits 15 14 13 12
Read 0 0 0 0
Write
Reset 0 0 0 0
56F826/827 User Manual, Rev. 3
ZCS
1. A sign change did not occur in a
0
2. Zero Crossing Control is disabled for
In a comparison between the current
channelx result and the previous
channelx result, a sign change condition
occurred as defined in the Zero Crossing
1
Control Register (ADSDIS).
Note:
11 10 9 8 7 6
0 0
DS9 DS8 DS7 DS6 DS5 DS4 DS3 DS2 DS1 DS0
0 0 0 0 0 0
Date:
Programmer:
6 of 13
Sheet
Zero Crossing Status Register
comparison between the current
channelx result and the previous
channelx result, or
channelx in the Zero Crossing Control
Register, ADSDIS.
To clear a specific ZCS[7:0] bit,
write a value of 1 to that bit.
5 4 3 2 1
0 0 0 0 0
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0
0