Freescale Semiconductor 56F800 User Manual page 473

Bit # Pin/Bit Name
213 MPIOD1—Output Enable
214 MPIOD1—Pull-up Enable
215 MPIOD2—Input
216 MPIOD2—Output
217 MPIOD2—Output Enable
218 MPIOD2—Pull-up Enable
219 MPIOD3—Input
220 MPIOD3—Output
221 MPIOD3—Output Enable
222 MPIOD3—Pull-up Enable
223 MPIOD4—Input
224 MPIOD4—Output
225 MPIOD4—Output Enable
226 MPIOD4—Pull-up Enable
227 MPIOD5—Input
228 MPIOD5—Output
229 MPIOD5—Output Enable
230 MPIOD5—Pull-up Enable
231 MPIOD6—Input
232 MPIOD6—Output
233 MPIOD6—Output Enable
234 MPIOD6—Pull-up Enable
235 MPIOD7—Input
236 MPIOD7—Output
237 MPIOD7—Output Enable
238 MPIOD7—Pull-up Enable
239 SCLK—Input
240 SCLK—Output
Freescale Semiconductor
Table 17-11. BSR Contents for 56F80x
Pin Type
Control
Control
Input/ Output
Input/ Output
Control
Control
Input/Output
Input/Output
Control
Control
Input/Output
Input/Output
Control
Control
Input/Output
Input/Output
Control
Control
Input/Output
Input/Output
Control
Control
Input/Output
Input/Output
Control
Control
Input/Output
Input/Output
JTAG Port, Rev. 3
56F826 Pin
BSR Cell Number
Type (100 LQFP
Package)
BC_1 –
BC_1 –
BC_1 76
BC_1 76
BC_1 –
BC_1 –
BC_1 77
BC_1 77
BC_1 –
BC_1 –
BC_1 78
BC_1 78
BC_1 –
BC_1 –
BC_1 79
BC_1 79
BC_1 –
BC_1 –
BC_1 82
BC_1 82
BC_1 –
BC_1 –
BC_1 83
BC_1 83
BC_1 –
BC_1 –
BC_1 84
BC_1 84
Register Summary
56F827 Pin
Number
(128 LQFP
Package)
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
30
30
21