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2.15 Test Points ........... . . 2-20 Appendix A 56F827EVM Schematics Appendix B 56F827EVM Bill of Material 56F827EVM User Manual, Rev. 2 Freescale Semiconductor...
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CS4218 Stereo Audio Codec......... . 2-16 List of Figures, Rev. 2 Freescale Semiconductor...
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56F827EVM User Manual, Rev. 2 Freescale Semiconductor...
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SCI Port #2 Connector ..........2-20 List of Tables, Rev. 2 Freescale Semiconductor...
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56F827EVM User Manual, Rev. 2 Freescale Semiconductor...
Appendix B, 56F827EVM Bill of Material - provides a list of the materials used on the DSP56F827EVM board Suggested Reading More documentation on the 56F827 and the DSP56F827EVM kit may be found at URL: www.freescale.com Preface, Rev. 2 Freescale Semiconductor...
Numbers Considered positive Voltage is often shown as unless specifically positive: +3.3V noted as a negative value Blue Text Linkable on-line ...refer to Figure 1-1 Bold Reference sources, ...see: paths, emphasis http://www.freescale.com/ DSP56F827EVM User Manual, Rev. 2 viii Freescale Semiconductor...
Printed Circuit Board Phase Locked Loop Random Access Memory Read-Only Memory Serial Communications Interface Port Serial Peripheral Interface Port SRAM Static Random Access Memory Synchronous Serial Interface Port Wait State Preface, Rev. 2 Freescale Semiconductor...
References The following sources were referenced to produce this manual: [1] DSP56800 Family Manual, DSP56800FM, Freescale Semiconductor [2] DSP56F826/827 Digital Signal Processor User’s Manual, DSP56F826_827UM, Freescale Semiconductor [3] DSP56F827 Technical Data, DSP56F827, Freescale Semiconductor DSP56F827EVM User Manual, Rev. 2 Freescale Semiconductor...
Chapter 1 Introduction The 56F827EVM is used to demonstrate the abilities of the 56F827 and to provide a hardware tool allowing the development of applications that use the 56F827. The 56F827EVM is an evaluation module board that includes a 56F827 part, 16-bit stereo codec, external memory and a daughter card expansion interface.
56F827. The 56F827EVM provides the features necessary for a user to write and debug software, demonstrate the functionality of that software and interface with the customer's application-specific device(s). The 56F827EVM is flexible enough to allow a user to fully...
1–2, 3–4, 5–6 & 7–8 1.3 56F827EVM Connections An interconnection diagram is shown in for connecting the PC and the external Figure 1-3 +12.0V DC power supply or external +5.0V DC lab power supply to the 56F827EVM board. Introduction, Rev. 2 Freescale Semiconductor...
1-3, on the 56F827EVM board. Optionally, attach an external +5.0V DC Figure lab power supply via the 2-pin terminal block, TB1. 5. Apply power to the external power supply. The green Power-On LED, LED7, will illuminate when power is correctly applied. 56F827EVM User Manual, Rev. 2 Freescale Semiconductor...
The power of the 16-bit 56F827 controller, combined with the on-board 16-bit external program static RAM (SRAM), 64K...
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The 56F827EVM uses a Freescale DSP56F827FG80 part, designated as U1 on the board and in the schematics. This part will operate at a maximum speed of 80MHz. A full description of the 56F827, including functionality and user information, is provided in these documents: • DSP56F827 Technical Data, (DSP56F827): Provides features list and specifications including signal descriptions, DC power requirements, AC timing requirements and available packaging.
This memory bank will operate with zero wait-state accesses while the 56F827 is running at 70MHz. However, when running at 80MHz, the memory bank operates with four wait-state accesses. This memory bank can be disabled by removing the jumper at JG3.
2-2. This memory connects directly to the SPI Port through a Figure header on the 56F827. It can be used to load program code and data into the 56F827’s internal or external memory spaces. A jumper block is provided, JG7, to allow the user to disconnect the on-board SPI EEPROM from the SPI port and allow him to connect his own SPI port peripheral.
P3. Flow control is not provided, but could be implemented using uncommitted GPIO signals. The pinout of connector P3 is listed 2-2. The RS-232 level converter/transceiver can be disabled by placing a jumper at JG2. Table RS-232 56F827 Level Converter Interface T1in T1out...
The 56F827EVM uses a 4.00MHz crystal, Y1, connected to its External Crystal Inputs, EXTAL and XTAL. The 56F827 uses its internal PLL to multiply the input frequency by 20, achieving its 80MHz maximum operating frequency. An external oscillator source can be connected to the controller by using the oscillator bypass connectors, JG4 and JG5;...
RESET. Refer to the DSP56F827 User’s Manual for a complete description of the chip’s operating modes. shows the two operation Table 2-3 modes available on the 56F827. Table 2-3. Operating Mode Selection Operating Mode Comment 1–2...
PB0 signal. User LED2 is controlled by PB1. User LED3 is controlled by PB2. User LED4 is controlled by PB3. User LED5 is controlled by PB4. User LED6 is controlled by PB5. Setting PB0, PB1, PB2, PB3, PB4 or PB5 to a Logic One value will turn on the associated LED. 56F827 INVERTING BUFFER +3.3V...
The JTAG connector on the 56F827EVM allows the connection of an external Host Target Interface for downloading programs and working with the 56F827’s registers. This connector is used to communicate with an external Host Target Interface which passes information and data back and forth with a host processor running a debugger program.
2.8.2 Parallel JTAG Interface Connector The Parallel JTAG Interface Connector, P2, allows the 56F827 to communicate with a Parallel Printer Port on a Windows PC; reference 2-6. By using this connector, the user can Figure download programs and work with the 56F827’s registers.
2-7. S2 allows the user to generate a hardware interrupt for signal line IRQA. S3 allows Figure the user to generate a hardware interrupt for signal line IRQB. These two switches allow the user to generate interrupts for his user-specific programs. +3.3V 56F827 IRQA 0.1µF +3.3V IRQB 0.1µF...
Reset 2.10 Reset Logic is provided on the 56F827 to generate an internal Power-On RESET. Additional reset logic is provided to support the RESET signals from the JTAG connector, the Parallel JTAG Interface and the user RESET push-button; refer to Figure 2-8.
A 16-bit audio quality stereo codec, Crystal Semiconductor CS4218, is connected to the 56F827’s SSI port to support audio, voice and signal analysis applications. The codec is clocked with a 12.288MHz oscillator. This allows the codec to operate between a sample frequency of 8kHz and 48kHz.
56F827 CS4218 Codec Enable Logic SDIN SDOUT SCLK STCK FSYNC STFS RESET CDIN CCLK Figure 2-11. CS4218 Stereo Audio Codec 2.12.1 Analog Input/Output The 56F827EVM uses jacks for line-level stereo input, line-level stereo output and stereo headphone output. A National Semiconductor LM4880 is used to provide the drive required for the use of headphones.
The controller’s external memory bus signals are connected to the Memory Daughter Card Expansion connector, J1. shows the port signal to pin assignments. Table 2-8 Table 2-8. Memory Daughter Card Connector Description Pin # Signal Pin # Signal PCS7 Technical Summary, Rev. 2 Freescale Semiconductor 2-17...
+3.3V +3.3V 2.13.2 Peripheral Daughter Card Expansion Connector The controller’s peripheral port signals are connected to the Peripheral Daughter Card Expansion connector, J2. shows the port signal to pin assignments. Table 2-9 56F827EVM User Manual, Rev. 2 2-18 Freescale Semiconductor...
The +5.0VA and AGND test points are located in the bottom right, analog corner, of the board. The +2.5V and +3.3V test points are located in the upper right, power supply section, of the board. 56F827EVM User Manual, Rev. 2 2-20 Freescale Semiconductor...
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Appendix A 56F827EVM Schematics Appendix A, Rev. 2 Freescale Semiconductor...
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56F827EVM User Manual, Rev. 2 A-10 Freescale Semiconductor...
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Appendix A, Rev. 2 Freescale Semiconductor A-11...
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56F827EVM User Manual, Rev. 2 A-12 Freescale Semiconductor...
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Multi-Purpose Input/Output port Preface-ix FSRAM On-board power regulation OnCE General Purpose Input/Output port Preface-ix OnCE(TM) GPIO OnCE Preface-ix GPIO Preface-ix On-Chip Emulation Preface-ix Operating Mode Host Parallel Interface Connector Host Target Interface Index, Rev. 2 Freescale Semiconductor Index - i...
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Serial Peripheral Interface port Preface-ix Preface-ix SRAM external data external program SRAM Preface-ix Preface-ix Static Random Access Memory Preface-ix Stereo 16-bit codec interface Stereo headphone interface Synchronous Serial Interface port Preface-ix DSP56F827EVM User Manual, Rev. 2 Index - ii Freescale Semiconductor...
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LDCForFreescaleSemiconductor@hibbertgroup.com application in which the failure of the Freescale Semiconductor product could create a situation where personal injury or death may occur. Should Buyer purchase or use Freescale Semiconductor products for any such unintended...
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