Freescale Semiconductor 56F800 User Manual page 468

Register Summary
Bit # Pin/Bit Name
73 WR_B—Pull-up Enable
74 DS_B—Input
75 DS_B—Output
76 DS_B—Output Enable
77 DS_B—Pull-up Enable
78 PS_B—Input
79 PS_B—Output
80 PS_B—Output Enable
81 PS_B—Pull-up Enable
82 IREQA_B—Input
83 IREQB_B—Input
84 D0—Input
85 D0—Output
86 D0—Output Enable
87 D0—Pull-up Enable
88 D1—Input
89 D1—Output
90 D1—Output Enable
91 D1—Pull-up Enable
92 D2—Input
93 D2—Output
94 D2—Output Enable
95 D2—Pull-up Enable
96 D3—Input
97 D3—Output
98 D3—Output Enable
99 D3—Pull-up Enable
100 D4—Input
16
Table 17-11. BSR Contents for 56F80x
Pin Type
Control
Input/Output
Input/ Output
Control
Control
Input/Output
Input/Output
Control
Control
Input
Input
Input/Output
Input/Output
Control
Control
Input/Output
Input/Output
Control
Control
Input/Output
Input/ Output
Control
Control
Input/Output
Input/Output
Control
Control
Input/Output
56F826/827 User Manual, Rev. 3
56F826 Pin
BSR Cell Number
Type (100 LQFP
Package)
BC_1 -
BC_1 28
BC_1 28
BC_1 –
BC_1 –
BC_1 29
BC_1 29
BC_1 –
BC_1 -
BC_1 32
BC_1 33
BC_1 34
BC_1 34
BC_1 –
BC_1 –
BC_1 35
BC_1 35
BC_1 –
BC_1 -
BC_1 36
BC_1 36
BC_1 _
BC_1 _
BC_1 37
BC_1 37
BC_1 –
BC_1 _
BC_1 38
56F827 Pin
Number
(128 LQFP
Package)
85
85
–
–
–
–
–
–
84
84
–
–
–
–
–
–
–
–
83
83
–
–
82
82
–
–
–
–
Freescale Semiconductor