3–20
F4–04AD 4-Channel Analog Input
Two's Complement 13-bit Format
–5V to +5V
+5V
0V
–5V
61440
65535, 0
In the left graph above, zero volts converts to a count of zero. Positive voltages up to
+5 volts convert to counts of up to decimal +4095. A few millivolts less than zero
converts to 65535, the equivalent to -1 count. At -5V, the conversion is to 61440
counts. The conversion method translates positive polarity signals per normal
binary scaling. It's negative values that include an additional step. In this case,we
start at the top of the 16-bit binary range (65535), and count downward. With zero
count point at mid-range,negative numbers transition to positive numbers.
As an example, suppose the module
sends the counts of –6 and +15 in
successive scans to the CPU. The RLL
program is going to sum the input
values. When the module is configured
for two's complement format, negative
numbers are specially formatted. It takes
the –6 in binary and takes a one's
complement by inverting all the bits.
Then, it adds 1 to the LSB to get a two's
complement representation. The 16-bit
result the module sends to the CPU is
decimal
65530,
or
representing –6.
In the ladder program, you can add +15
to this number. By ignoring all end
carries, we have the correct answer of
+9. The ladder program is simplified
because it does not need to examine a
sign bit to do a subtract instruction.
–10V to +10V
+10V
0V
–10V
4095
61440
FFFA
hex,
A
B
A + B = C
65535, 0
4095
V40401
MSB
Example: In the module, we
start with the number "6".
0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0
Take one's complement by
inverting all the bits.
1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 1
Add 1 to the LSB, for two's com-
plement representation of "–6".
This number is sent to the CPU.
1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 0
In the CPU, we add the number "+15
0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1
The sum of "–6" and "+15" is "9".
0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1
LSB
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