14–24
F4–04DA–2 Analog Voltage Output
Sequencing
Example 5
Bipolar Data
4
4
4
430
440
450
The following example program is for use with bipolar outputs. All this does is add a
sign bit output which the ladder must handle. This example works with all DL405
CPUs.
Ch4. Done
C504
Ch3. Done
C503
C603
Ch2. Done
C502
C602
Ch1 Done
C501
C601
Program is continued on the next page.
When channel 4 has been updated, C500 restarts
C500
the update sequence.
OUT
LD
When channel 3 has been updated, this rung loads
V3103
the data for channel 4 into the accumulator and
converts the data to a binary value. By turning on
C503, this triggers the channel update (see the
BIN
channel select rungs).
C504
OUT
When channel 4's data is negative (indicated by
ORD
C603), set the sign bit.
K8000
When channel 2 has been updated, this rung loads
LD
the data for channel 3 into the accumulator. By
V3102
turning on C502, this triggers the channel update
(see the channel select rungs below).
BIN
C503
OUT
When channel 3's data is negative (indicated by
ORD
C602), set the sign bit.
K8000
When channel 1 has been updated, this rung loads
LD
the data for channel 2 into the accumulator. By
V3101
turning on C501, this triggers the channel update
(see the channel select rungs below).
BIN
C502
OUT
When channel 2's data is negative (indicated by
ORD
C601), set the sign bit.
K8000
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