Output Enable Bit - Automation Direct DL405 User Manual

Output Enable Bit

Output bit 14 is the Output Enable
control bit for all four channels. When it is
off, all channel output currents decrease
to their lowest level, which is 4 mA for
connected loads. Disabling the outputs
also clears the module's output data
registers for each channel. To resume
analog output levels, first the Output
Enable control bit must turn on. Then,
the CPU must write new data to each
channel to restore the output current for
that channel.
Analog Data Bits The first twelve bits of the V-memory
location represent the analog data in
binary format. Each bit has a binary
weight according to the following table.
Bit
0
1
2
3
4
5
The remaining bit (bit 15) is not used and is ignored by the module.
Module Since the module has 12-bit resolution,
the analog signal is made of 4096 counts
Resolution
ranging from 0 – 4095 (2
20 mA scale, sending a 0 produces a 4
mA signal, and 4095 gives a 20 mA
signal. This is equivalent to a binary
value of 0000 0000 0000 to 1111 1111
1111, or 000 to FFF hexadecimal. The
graph to the right shows the linear
relationship between the data value and
output signal level.
4 to 20mA
Value Bit
1 6
2 7
4 8
8 9
16 10
32 11
Each count can also be expressed in
terms of the signal level by using the
equation shown. The following table
shows the smallest signal change that
occurs when the digital value increases
by 1 LSB.
Signal Range
F4–04DA–1 Analog Current Output
MSB
1 1
5 4
MSB
1 1
Value
5 4
64
128
256
512
1024
2048
20mA
12
). For the 4 to
Resolution + H * L
H = high limit of the signal range
L = low limit of the signal range
Span Divide By
(H – L)
16mA 4095
V40501
1 1 1 1 9 8 7 6 5 4 3 2 1
3 2 1 0
– Output Enable Bit
OFF = Disable (and clear)
ON = Enable
V40501
1 1 1 1 9 8 7 6 5 4 3 2 1
3 2 1 0
– data bits
4mA
0 4095
4095
Smallest Change
3.91 mA
13–9
LSB
0
LSB
0