Channel Select
Output bits 12, 13, and 14 of both data words are the channel select outputs. They
Bits
are binary encoded to select the channel that will be updated with the data. The
bits of the lower data word select channels 1 to 8 as follows.
Bit
14
Off
Off
Off
Off
On
On
On
On
The bits of the upper data word select channels 9 to 16 as follows.
Bit
14
Off
Off
Off
Off
On
On
On
On
Output Enable
Output bit 15 is the Output Enable
Bits
control bit in each data word for all eight
channels of each bank. When either bit
is off, the corresponding group of eight
channel output currents decrease to
their lowest level, which is 4 mA for
connected loads. Disabling the outputs
also clears all eight output data registers
for each bank. To resume analog output
levels, first the appropriate Output
Enable control bit must turn on. Then,
the CPU must write new data to each
channel to restore the output current for
that channel.
F4–16DA–1 16-Ch. Analog Current Output
Bit
Bit
13
12
Channel
Off
Off
Off
On
On
Off
On
On
Off
Off
Off
On
On
Off
On
On
Bit
Bit
13
12
Channel
Off
Off
Off
On
10
On
Off
11
On
On
12
Off
Off
13
Off
On
14
On
Off
15
On
On
16
V40501
MSB
1
1
1
1
1
1
1
9 8 7 6 5 4 3 2 1
2
5
4
3
2
1
0
3
4
5
– Channel Select Bits,
6
channels 1 through 8
7
8
V40502
MSB
9
1
1
1
1
1
1
9 8 7 6 5 4 3 2 1
5
4
3
2
1
0
– Channel Select Bits,
channels 9 through 16
V40501
MSB
1
1
1
1
1
1
9 8 7 6 5 4 3 2 1
5
4
3
2
1
0
– Output Enable Bit,
channels 1 through 8
V40502
MSB
1
1
1
1
1
1
9 8 7 6 5 4 3 2 1
5
4
3
2
1
0
– Output Enable Bit,
channels 9 through 16
OFF = Disable (and clear)
ON = Enable
16–9
LSB
0
LSB
0
LSB
0
LSB
0
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