ABB REL650 Technical Manual page 809

1MRK 506 382-UEN A
Line distance protection REL650 2.2 IEC
Technical manual
Fast clock synchronization mode
At start-up and after interruptions in the IRIG B time signals, the deviation between
the external time system and the internal differential time system can be
substantial. A new start-up is also required, for example, after maintenance of the
auxiliary voltage system.
When the time difference is > 16 μs, the line differential protection function is
blocked and the time regulator for the hardware clock automatically uses a fast
mode to synchronize the clock systems. Time adjustment is made with an
exponential function, that is, with big time adjustment steps in the beginning, and
then smaller steps until a time deviation of < 16 μs between the external time
system and the internal differential time system has been reached. The protection
function is then enabled and the synchronization remains in fast mode or switches
to slow mode depending on the setting.
Slow clock synchronization mode
During normal service, a setting with slow synchronization mode is used. This
prevents the hardware clock to make too big a time steps (> 16 µs) emanating from
the requirement of correct timing in the line differential protection function.
Synchronization principle
From a general point of view synchronization can be seen as a hierarchical
structure. A function is synchronized from a higher level and provides
synchronization to lower levels.
Synchronization from
a higher level
Optional synchronization of
modules at a lower level
IEC09000342 V1 EN-US
Figure 384: Synchronization principle
A function is said to be synchronized when it periodically receives synchronization
messages from a higher level. As the level decreases, the accuracy of the
synchronization decreases as well. A function can have several potential sources of
synchronization, with different maximum errors. This gives the function the
possibility to choose the source with the best quality, and to adjust its internal clock
based on this source. The maximum error of a clock can be defined as:
Basic IED functions
Function
IEC09000342-1-en.vsd
Section 19
M11346-83 v4
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