ABB REL650 Technical Manual page 300

Section 8
Voltage protection
294
U
a
a>b
U1>
b
IEC10000100 V2 EN-US
Figure 146: Logic diagram for step 1, Definite time delay, DT operation
U1<
ST1
TR1
tReset1
t1
IEC10000039 V3 EN-US
Figure 147: Example for Definite Time Delay stage 1 reset
tReset1 t1
t t
OFF ON
Delay Delay
Line distance protection REL650 2.2 IEC
1MRK 506 382-UEN A
ST1
TR1
AND
IEC10000100-2-en.vsd
IEC10000039-3-en.vsd
Technical manual