Xilinx RocketIO User Manual page 97

Product Not Recommended for New Designs
Other Important Design Notes
RocketIO™ Transceiver User Guide
UG024 (v3.0) February 22, 2007
end
else
begin
if ( count && ( wait_to_sync != 4'b0000 ) )
wait_to_sync <= wait_to_sync - 4'b0001;
if ( rxcommadet )
count
end
end
// This process maintains output sync, which indicates
// when outgoing aligned_data
// should be properly aligned, with the comma in aligned_data[31:24].
// Output aligned_data is
// considered to be in sync when a comma is seen on
// rxdata (as indicated
// by rxchariscomma3 or 1) after the counter wait_to_sync
// has reached 0, indicating
// that commas seen by the comma detection circuit
// have had time to propagate to
// aligned_data after initialization of the elastic buffer.
always @ ( posedge usrclk2 )
begin
if ( rxreset | rxrealign )
sync <= 1'b0;
else if ( ( wait_to_sync == 4'b0000 ) &
( rxchariscomma3 | rxchariscomma1 ) )
sync <= 1'b1;
end
// This process generates aligned_data with commas aligned in [31:24],
// assuming that incoming commas are aligned to [31:24] or [15:8].
// Here, you could add code to use ENPCOMMAALIGN and
// ENMCOMMAALIGN to enable a move back into the byte_sync=0 state.
always @ ( posedge usrclk2 or posedge rxreset )
begin
if ( rxreset )
begin
rxdata_reg <= 16'h0000;
aligned_data
rxisk_reg
aligned_rxisk
byte_sync
end
else
begin
rxdata_reg[15:0] <= rxdata[15:0];
rxisk_reg[1:0]
if ( rxchariscomma3 )
begin
aligned_data[31:0] <= rxdata[31:0];
aligned_rxisk[3:0]
byte_sync
end
else
if ( rxchariscomma1 | byte_sync )
begin
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<= 1'b1;
<= 32'h0000_0000;
<= 2'b00;
<= 4'b0000;
<= 1'b0;
<= rxisk[1:0];
<= rxisk[3:0];
<= 1'b0;
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