Electrical Specifications; Power And Ground Pins; Decoupling Guidelines; Voltage Rail Decoupling - Intel 2ND GENERATION CORE PROCESSOR FAMILY MOBILE - DATASHEET VOLUME 1 01-2011 Datasheet

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Electrical Specifications
7

Electrical Specifications

7.1

Power and Ground Pins

The processor has V
on-chip power distribution. All power pins must be connected to their respective
processor power planes, while all VSS pins must be connected to the system ground
plane. Use of multiple power and ground planes is recommended to reduce I*R drop.
The VCC pins and VAXG pins must be supplied with the voltage determined by the
processor Serial Voltage IDentification (SVID) interface.
level for the various VIDs.
7.2

Decoupling Guidelines

Due to its large number of transistors and high internal clock speeds, the processor is
capable of generating large current swings between low- and full-power states. To keep
voltages within specification, output decoupling must be properly designed.
Caution:
Design the board to ensure that the voltage provided to the processor remains within
the specifications listed in
reduced lifetime of the processor.
7.2.1

Voltage Rail Decoupling

The voltage regulator solution must:
• provide sufficient decoupling to compensate for large current swings generated
during different power mode transitions.
• provide low parasitic resistance from the regulator to the socket.
• meet voltage and current specifications as defined in
7.2.2

PLL Power Supply

An on-die PLL filter solution is implemented on the processor. .
Datasheet, Volume 1
, V
, V
V
CC
CCIO
DDQ,
CCPLL,
Table
7-3. Failure to do so can result in timing violations or
V
, V
and V
(ground) inputs for
CCSA
AXG
SS
Table 7-1
specifies the voltage
Table
7-3.
87

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