System Memory Timing Support; System Memory Organization Modes; Single-Channel Mode; Dual-Channel Mode - Intel ® Flex Memory Technology Mode - Intel 2ND GENERATION CORE PROCESSOR FAMILY MOBILE - DATASHEET VOLUME 1 01-2011 Datasheet

2.1.2

System Memory Timing Support

The IMC supports the following DDR3 Speed Bin, CAS Write Latency (CWL), and
command signal mode timings on the main memory interface:
• t = CAS Latency
CL
• t
RCD
• t = PRECHARGE Command Period
RP
• CWL = CAS Write Latency
• Command Signal modes = 1n indicates a new command may be issued every clock
and 2n indicates a new command may be issued every 2 clocks. Command launch
mode programming depends on the transfer rate and memory configuration.
Table 2-2.

DDR3 System Memory Timing Support

Segment
Extreme
Edition (XE)
and
Quad Core SV
Dual Core SV,
Low voltage
and Ultra low
voltage
Notes:
1. System memory timing support is based on availability and is subject to change.
2.1.3

System Memory Organization Modes

The IMC supports two memory organization modes—single-channel and dual-channel.
Depending upon how the DIMM Modules are populated in each memory channel, a
number of different configurations can exist.
2.1.3.1

Single-Channel Mode

In this mode, all memory cycles are directed to a single-channel. Single-channel mode
is used when either Channel A or Channel B DIMM connectors are populated in any
order, but not both.
2.1.3.2 Dual-Channel Mode – Intel
The IMC supports Intel Flex Memory Technology Mode. Memory is divided into a
symmetric and an asymmetric zone. The symmetric zone starts at the lowest address
in each channel and is contiguous until the asymmetric zone begins or until the top
address of the channel with the smaller capacity is reached. In this mode, the system
runs with one zone of dual-channel mode and one zone of single-channel mode,
simultaneously, across the whole memory array.
Note: Channels A and B can be mapped for physical channels 0 and 1 respectively or vice
versa; however, channel A size must be greater or equal to channel B size.
24
= Activate Command to READ or WRITE Command delay
Transfer
tCL
Rate
(tCK)
(MT/s)
1066 7
1333 9
1600 11
7
1066
8
1333 9
tRCD tRP
(tCK) (tCK)
7 7
9 9
11 11
7 7
8 8
9 9
®
Flex Memory Technology Mode
Interfaces
CWL CMD
1
Notes
(tCK) Mode
6 1n/2n
7 1n/2n
8 1n/2n
6 1n/2n
6 1n/2n
7 1n/2n
Datasheet, Volume 1