Reserved Or Unused Signals; System Agent (Sa); Cc Vid; Vccsa_Vid Configuration - Intel 2ND GENERATION CORE PROCESSOR FAMILY MOBILE - DATASHEET VOLUME 1 01-2011 Datasheet

7.4 System Agent (SA) V
The Vcc
SA
VCCSA_VID[0] output default logic state is low for the 2nd Generation Intel
processor family mobile; logic high is reserved for future compatibility.
VCCSA_VID[1] output default logic state is low – will not change the SA voltage. Logic
high will reduce the voltage.
Note: During boot, the processor's Vcc
Table 7-2
Table 7-2.

VCCSA_VID configuration

Processor family
2nd Generation Intel
Core™ processor Family
Mobile
Future Intel processors
Notes:
1. Some of V
7.5

Reserved or Unused Signals

The following are the general types of reserved (RSVD) signals and connection
guidelines:
• RSVD – these signals should not be connected
• RSVD_TP – these signals should be routed to a test point
• RSVD_NCTF – these signals are non-critical to function and may be left un-
connected
Arbitrary connection of these signals to V
to any other signal (including each other) may result in component malfunction or
incompatibility with future processors. See
and the location of all reserved signals.
For reliable operation, always connect unused inputs or bi-directional signals to an
appropriate signal level. Unused active high inputs should be connected through a
resistor to ground (V
interfere with some Test Access Port (TAP) functions, complicate debug probing, and
prevent boundary scan testing. A resistor must be used when tying bi-directional
signals to power or ground. When tying any signal to power or ground, a resistor will
also allow for system testability.
92
is configured by the processor output pins VCCSA_VID[1:0].
SA
specifies the different VCCSA_VID configurations.
VCCSA_VID[0]
®
0
0
1
1
configurations are reserved for future Intel processor families.
CCSA
). Unused outputs maybe left unconnected; however, this may
SS
VID
CC
is 0.9 V.
Selected VCCSA
VCCSA_VID[1] (XE and SV
segments)
0
1
0
1
, V , V , V
CC CCIO DDQ
Chapter 8 for a pin listing of the processor
Electrical Specifications
®
Core™
Selected VCCSA
(LV and ULV
segments)
0.9 V 0.9 V
0.8 V 0.85 V
Note 1 Note 1
Note 1 Note 1
, V V , V
CCPLL CCSA, AXG SS
Datasheet, Volume 1
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