Contents
1
Introduction ............................................................................................................ 11
1.1
1.1.1
1.2
Interfaces ........................................................................................................ 13
1.2.1
1.2.2
PCI Express* ......................................................................................... 14
1.2.3
1.2.4
1.2.5
Processor Graphics ................................................................................. 16
1.2.6
1.2.7
1.3
1.3.1
Processor Core....................................................................................... 17
1.3.2
System ................................................................................................. 17
1.3.3
Memory Controller.................................................................................. 17
1.3.4
PCI Express* ......................................................................................... 17
1.3.5
DMI...................................................................................................... 17
1.3.6
1.4
1.5
Package ........................................................................................................... 18
1.6
Terminology ..................................................................................................... 18
1.7
Related Documents ........................................................................................... 21
2
Interfaces................................................................................................................ 23
2.1
2.1.1
2.1.2
2.1.3
2.1.3.1
2.1.3.2
2.1.4
2.1.5
Technology Enhancements of Intel
2.1.5.1
2.1.5.2
2.1.5.3
2.1.6
2.1.7
Data Scrambling .................................................................................... 26
2.1.8
2.2
PCI Express* Interface....................................................................................... 27
2.2.1
2.2.1.1
2.2.1.2
2.2.1.3
2.2.2
2.2.3
PCI Express Graphics .............................................................................. 29
2.2.4
2.3
2.3.1
DMI Error Flow....................................................................................... 30
2.3.2
2.3.3
DMI Link Down ...................................................................................... 31
2.4
Datasheet, Volume 1
®
Command Overlap .................................................................... 26
Transaction Layer ..................................................................... 28
Data Link Layer ........................................................................ 28
Physical Layer .......................................................................... 28
®
FDI) ............................................. 17
®
®
Fast Memory Access (Intel
®
3
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