Integrated Memory Controller States; Pcie Link States; Dmi States; Processor Graphics Controller States - Intel 2ND GENERATION CORE PROCESSOR FAMILY MOBILE - DATASHEET VOLUME 1 01-2011 Datasheet
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4.1.3
Integrated Memory Controller States
Table 4-3.
Integrated Memory Controller States
State
Power up
Pre-charge
Power-down
Active Power-
Down
Self-Refresh
4.1.4
PCIe Link States
Table 4-4.
PCIe Link States
State
L0
L0s
L1
L3
4.1.5
DMI States
Table 4-5.
DMI States
State
L0
L0s
L1
L3
4.1.6
Processor Graphics Controller States
Table 4-6.
Processor Graphics Controller States
State
D0
D3 Cold
46
CKE asserted. Active mode.
CKE de-asserted (not self-refresh) with all banks closed.
CKE de-asserted (not self-refresh) with minimum one bank active.
CKE de-asserted using device self-refresh.
Full on – Active transfer state.
First Active Power Management low power state – Low exit latency.
Lowest Active Power Management – Longer exit latency.
Lowest power state (power-off) – Longest exit latency.
Full on – Active transfer state.
First Active Power Management low power state – Low exit latency.
Lowest Active Power Management – Longer exit latency.
Lowest power state (power-off) – Longest exit latency.
Full on, display active.
Power-off.
Power Management
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Description
Datasheet, Volume 1
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