Input Device Hysteresis - Intel 2ND GENERATION CORE PROCESSOR FAMILY MOBILE - DATASHEET VOLUME 1 01-2011 Datasheet

Electrical Specifications
7.10.3

Input Device Hysteresis

The input buffers in both client and host models must use a Schmitt-triggered input
design for improved noise immunity. Use
Figure 7-2.

Input Device Hysteresis

Datasheet, Volume 1
V
TTD
Maximum V
P
Minimum V
P
Maximum V
N
Minimum V
N
PECI Ground
Figure 7-2 as a guide for input buffer design.
PECI High Range
PECI Low Range
§ §
Minimum Valid Input
Hysteresis Signal Range
105