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2-26
S E N D
RCV
CPU Terminal (CTA1)
In this interface type, a CPU port is connected to the channel interface at one node (typically Node
M); a terminal is connected to the opposite-end channel (typically Node S). SEND control RTS (Re-
quest to Send) at both channel interfaces becomes RCV control, DCD (Data Carrier Detect) at both
channel interfaces. SEND control DTR (Data Terminal Ready) becomes RCV control DSR (Data
Set Ready) at both channel interfaces. The state of Node M SEND controls RTS and DTR are con-
trolled by the CPU at the Node M channel, and controlled by the terminal at the. Node S channel
interface.
For data transmission to begin, both the CPU and the terminal must set RTS and DTR On; this re-
sults in RCV controls DCD and DSR being On at both channel interfaces. The program plugs at
both channel interfaces return the state of RTS back to the channel as control signal CTS (Clear to
Send). If either the CPU or the terminal require RTS/CTS controls, the Off-to-On transition of RTS
always results in CTS turning On.
S E N D
RCV
CPU to Terminal - DCD/DSR On (CTB1)
In this interface type, a CPU port is connected to the channel interface at one node (typically Node
M); a terminal is connected to the opposite-end channel interface (typically Node S). SEND control
RTS (Request to Send) at both channel interfaces becomes RCV control DCD (Data Carrier Detect)
at both channel interfaces. SEND control DTR (Data Terminal Ready) becomes RCV control DSR
(Data Set Ready) at both channel interfaces.
These control signals are forced On at all times, so that both CPU port and terminal are always ready
to transmit. The program plugs at both channel interfaces return the state of RTS back to the channel
as control signal CTS (Clear to Send). If either the port or the terminal require RTS/CTS controls,
the Off-to-On transition of RTS always results in CTS turning On.
036R660-000, Issue 10
NODE M
: RTS
DTR
: DCD
DSR
CPU/TERM - DCD/DSR ON
NODE M
: RTS
DTR
: DCD
DSR
System Overview
CPU/TERM
NODE S
RTS
DCD
NODE S
RTS
DCD
DTR
DSR
DTR
DSR
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