General DataComm Megamux Plus 036M241 Operator Instructions Manual page 46

Time division multiplexer
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System Overview
The most common application for this timing arrangement is when ATT's DDS (Digital Data-
phone Service) is used as either an aggregate link or a channel 22 tail circuit. ATT maintains a
precise timing signal (derived from an atomic clock) across all DDS links. If a DDS link provides
the master timing source for the MEGAMUX PLUS system, any channel that connects to a DDS
tail circuit link should be set for external transmit and receive timing. Since MEGAMUX PLUS
timing is phase-locked to DDS timing, any channel connected to DDS is synchronized to the ex-
ternal transmit and receive clocks from the DDS link. Figure 2-6 illustrates this application; the
master timing signal for the TDM enters the system via channel 22. (Channel 22 is the only chan-
nel that can provide an external master timing source for the system.)
Data/Stop Bits
If a channel's circuit type is asynchronous, the character format of the asynchronous device con-
nected to the channel must be specified. The character format is expressed as the number of data
bits and stop bits used to represent a character. The data channel module uses this information in
converting asynchronous input data to synchronous data, and synchronous output data to asyn-
chronous data. The conversion involves removing start and stop bits from each incoming charac-
ter, and transmitting the remaining data bits as synchronous data, timed by MEGAMUX PLUS
timing. At the opposite-end TDM, the asynchronous characters are re-constructed by adding stop
and start bits to the data bits. The parameter selected under DATA/STOP BITS indicates the pro-
cess-ing required for the conversion.
The possible selections are:
This selection depends entirely on the character format of the device connected to the channel.
FIGURE 2-6. EXTERNAL TRANSMIT AND RECEIVE TIMING
5/1.5 (five data bits, 1.5 stop bits)
6/1.0 (six data bits, 1 stop bit)
6/2.0 (six data bits, 2 stop bits)
7/1.0 (seven data bits, 1 stop bit)
7/2.0 (seven data bits, 2 stop bits)
8/1.0 (eight data bits, 1 stop bit)
8/2.0 (eight data bits, 2 stop bits)
9/1.0 (nine data bits, 1 stop bit)
FOR SYNCHRONOUS CHANNELS
2-17
036R660-000, Issue 10

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