General DataComm Megamux Plus 036M241 Operator Instructions Manual page 44

Time division multiplexer
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System Overview
is because the two timing signals, no matter how precise, have some difference in frequency. One
timing signal inevitably is slightly faster or slower than the other, so that one signal lags behind
the other: This would eventually result in data errors. MEGAMUX PLUS has the ability to either
generate a master timing signal for the system, or to phase-lock system timing to an external
source. The selection of sources for synchronous transmit and receive data extends the phase-
locking to all synchronous equipment connected to channels.
There are three possible synchronous timing arrangements:
Transmit Internal/Receive Internal (I/I)
Transmit External/Receive Internal (E/I)
Transmit External/Receive External (E/E)
These selections must be made for both the Node M and Node S TDM channels. The timing ar-
rangements at each node's channel interface need not be symmetrical.
Each selection is discussed below:
Transmit Internal/Receive Internal
With this arrangement, tim-ing for transmit and receive data is provided to the equipment con-
nected to the channel, This selection is normally used for terminals, front-end processors, and
CPU ports operating through synchronous channels. The device connected to the channel must
be set for external timing when this selection is made. Figure 2-4 illustrates the internal transmit
and receive clock application.
FIGURE 2-4. INTERNAL TRANSMIT AND RECEIVE CLOCK TIMING
FOR SYNCHRONOUS CHANNELS
2-15
036R660-000, Issue 10

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