Exception Stack Frame Definition - Freescale Semiconductor MCF5480 Reference Manual

Vector Numbers Vector Offset (Hex)
48
49
50
51
52
53
54
55
56–60
61
62–63
64–255
1
'Fault' refers to the PC of the faulting instruction. 'Next' refers to the PC of the instruction immediately after the
faulting instruction. NextFP' refers to the PC of the next floating-point instruction.
ColdFire processors inhibit sampling for interrupts during the first instruction of all exception handlers.
This allows any handler to effectively disable interrupts, if necessary, by raising the interrupt mask level
in the SR.
3.8.1

Exception Stack Frame Definition

The first longword of the exception stack frame,
and 16-bit status register. The second holds the 32-bit program counter address of the faulted or interrupted
instruction.
31
A7→ FORMAT
+ 0x04
Table 3-22 describes F/V fields. FS encodings added to support the CF4e MMU are noted.
3-38
Table 3-21. Exception Vector Assignments (Continued)
Stacked Program Counter
0C0
0C4 NextFP or Fault
0C8
0CC NextFP or Fault
0D0 NextFP or Fault
0D4 NextFP or Fault
0D8 NextFP or Fault
0DC NextFP or Fault
0E0–0F0
0F4
0F8–0FC
100–3FC
28 27 26 25
FS[3–2] VEC
PROGRAM COUNTER [31:0]
Figure 3-15. Exception Stack Frame
MCF548x Reference Manual, Rev. 3
1
Fault Floating-point branch on unordered
condition
Floating-point inexact result
NextFP Floating-point divide-by-zero
Floating-point underflow
Floating-point operand error
Floating-point overflow
Floating-point input not-a-number (NAN)
Floating-point input denormalized
number
— Reserved
Fault Unsupported instruction
— Reserved
Next User-defined interrupts
Figure 3-15, holds the 16-bit format/vector word (F/V)
18 17 16 15
FS[1–0]
Assignment
STATUS REGISTER
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0