Mib Block Counters Memory Map - Freescale Semiconductor MCF5480 Reference Manual

MBAR MBAR
Offset for Offset for
FEC0 FEC1
0x9128– 0x9828–
0x9140 0x9840
0x9144 0x9944
0x9184 0x9984
0x9188 0x9988
0x918C 0x998C
0x9190 0x9990
0x9194 0x9994
0x9198 0x9998
0x919C 0x999C
0x91A0 0x99A0
0x91A4 0x99A4
0x91A8 0x99A8
0x91AC 0x99AC
0x91B0 0x99B0
0x91B4 0x99B4
0x91B8 0x99B8
0x91BC 0x99BC
0x91C0 0x99C0
0x91C4 0x99C4
0x91C8 0x99C8
30.3.3

MIB Block Counters Memory Map

Table 30-6 defines the MIB Counters memory map which defines the locations in the MIB RAM space
where hardware maintained counters reside. These fall in the 0x9200–0x93FF address offset range for
FEC0 and the 0x9A00–0x9BFF address offset range for FEC1. The counters are divided into two groups.
RMON counters are included which cover the Ethernet statistics counters defined in RFC 1757. In addition
to the counters defined in the Ethernet statistics group, a counter is included to count truncated frames as
the FEC only supports frame lengths up to 2047 bytes. The RMON counters are implemented
independently for transmit and receive to insure accurate network statistics when operating in full duplex
mode.
IEEE counters are included which support the mandatory and recommended counter packages defined in
Section 5 of ANSI/IEEE Std. 802.3 (1998 edition). The IEEE Basic Package objects are supported by the
FEC but do not require counters in the MIB block. In addition, some of the recommended package objects
30-8
Table 30-5. FEC Register Memory Map (Continued)
Name
Reserved
FEC Transmit FIFO Watermark
FEC Receive FIFO Data Register
FEC Receive FIFO Status Register
FEC Receive FIFO Control Register
FEC Receive FIFO Last Read Frame Pointer
FEC Receive FIFO Last Write Frame Pointer
FEC Receive FIFO Alarm Register
FEC Receive FIFO Read Pointer Register
FEC Receive FIFO Write Pointer Register
FEC Transmit FIFO Data Register
FEC Transmit FIFO Status Register
FEC Transmit FIFO Control Register
FEC Transmit FIFO Last Read Frame Pointer
FEC Transmit FIFO Last Write Frame Pointer
FEC Transmit FIFO Alarm Register
FEC Transmit FIFO Read Pointer Register
FEC Transmit FIFO Write Pointer Register
FIFO Reset Register
CRC and Transmit Frame Control Word Register
MCF548x Reference Manual, Rev. 3
Byte 0 Byte 1 Byte 2
FECTFWR
FECRFDR
FECRFSR
FECRFCR
FECRLRFP
FECRLWFP
FECRFAR
FECRFRP
FECRFWP
FECTFDR
FECTFSR
FECTFCR
FECTLRFP
FECTLWFP
FECTFAR
FECTFRP
FECTFWP
FECFRST
FECCTCWR
Freescale Semiconductor
Byte 3