Functional Description; Start Signal; Slave Address Transmission; Stop Signal - Freescale Semiconductor MCF5480 Reference Manual

Normally, a standard communication is composed of four parts: START signal, slave address transmission,
data transfer, and STOP signal. The parts of a communication are described briefly in the following
sections and illustrated in
28.4.1

START Signal

When the bus is free—that is, when no master device is engaging the bus (both SCL and SDA lines are at
logical high)—a master may initiate communication by sending a START signal. A START signal (A in
Figure 28-8) is defined as a high-to-low transition of SDA while SCL is high. This signal denotes the
beginning of a new data transfer (each data transfer may contain several bytes of data) and awakens all
slaves.
msb
SCL
1 2
SDA
AD7 AD6 AD5 AD4 AD3 AD2 AD1 R/W
A Slave (or Calling) Address
START
(Master driven)
Signal
28.4.2

Slave Address Transmission

The master sends the slave address in the first byte after the START signal (B in
seven-bit calling address (the slave address), it sends the R/W bit (C), which indicates the slave data
transfer direction (0 = write transfer; 1 = read transfer).
Each slave must have a unique address. An I
be master and slave at the same time.
The slave whose address matches that sent by the master pulls SDA low at the ninth serial clock (D) to
return an acknowledge bit.
28.4.3

STOP Signal

The master can terminate the communication by generating a STOP signal ("F" in
bus. A STOP signal is defined as a low-to-high transition of SDA while SCL is at logical 1. The master
can generate a STOP even if the slave has generated an acknowledge, at which point the slave must release
the bus. The master may also generate a START signal followed by a calling command without generating
a STOP signal first. This is called repeated START. Refer to
28.4.4

Data Transfer

When successful slave addressing is achieved, the data transfer can proceed (E in
byte-by-byte basis in the direction specified by the R/W bit sent by the calling master. Each data byte is 8
bits long.
Freescale Semiconductor
Figure 28-8.
Interrupt bit is set
(Byte complete)
lsb
3 4 5 6 7 8
R/W ACK
C
B
Figure 28-8. Start, Address Transfer, and Stop Signal
2
MCF548x Reference Manual, Rev. 3
SCL held low while
Interrupt is serviced
msb
9 1 2 3
XXX D7 D6 D5
(Master driven)
Bit
D
C master must not transmit its own slave address; it cannot
Section 28.4.6, "Repeated

Functional Description

lsb
4 5 6 7 8 9
D4 D3 D2 D1 D0
Data Byte
No
ACK
Bit
E
Figure 28-8). After the
Figure 28-8) to free the
Start."
Figure
STOP
Signal
F
28-8) on a
28-9