Transfer Initiation And Interrupt - Freescale Semiconductor MCF5480 Reference Manual

2. Update the I2ADR to define it as a slave device (give it a slave address)
3. Set I2CR[IEN] to enable the I
4. Modify the I2CR to select master/slave mode, transmit/receive mode, or interrupt enable
If I2SR[IBB] is set when the I
following code sequence before proceeding with normal initialization code.
This issues a STOP command to the slave device, placing it in an idle state
as if it were just power-cycled on.
I2ICR = 0x00
I2CR = 0x0
I2CR = 0xA
dummy read of I2DR
I2SR = 0x0
I2CR = 0x0
I2ICR = 0x01
28.5.1

Transfer Initiation and Interrupt

After completing initialization, serial data can be transmitted by selecting master transmit mode. If the
device is connected to a multi-master bus system, the state of the bus busy bit (BB) must be tested to check
whether the serial bus is free.
If the bus is free (BB = 0), the first byte (the slave address) can be sent. The data written to the data register
comprises the slave calling address, and the LSB is set to indicate the direction of transfer required from
the slave.
Depending on the relative frequencies of the system clock and the SCL period, it may be necessary to wait
until the bus is busy after writing the calling address to the data register (I2DR) before proceeding with the
following instructions.
Following is an example of how to generate a START signal:
/**********************************
* START generation in Master mode *
***********************************/
/* Make sure bus is idle (poll Bus Busy bit) */
while ( (MCF_I2C_I2SR & MCF_I2C_I2SR_IBB) );
/* Put module in master TX mode (generates START) */
MCF_I2C_I2CR |= 0x10;
MCF_I2C_I2CR |= 0x20;
/* Put target address into I2DR */
MCF_I2C_I2DR = TARGET_ADDR;
Freescale Semiconductor
2
C interface system
NOTE
2
C bus module is enabled, execute the
MCF548x Reference Manual, Rev. 3
Initialization Sequence
28-13