Figure 10-12: Sample & Hold Timing - Teledyne 300E Instruction Manual

Model 300E Carbon Monoxide Analyzer
Instruction Manual
The workhorses of the Sync/Demod Board are the four Sample-and-Hold circuits
that capture various voltage levels found in the amplified detector signal needed to
determine the value of CO MEAS and CO REF. They are activated by logic signals
under the control of a Compact Programmable Logic Device (PLD), which in turn
responds to the output of the Segment Sensor and M/R Sensor described in
Figure 10–11. The four Sample and Hold circuits are:
Designation
Measure Gate
Measure Dark Gate
Reference Gate
Reference Dark Gate
Timing for activating the Sample and Hold circuits is provided by a Phase Lock Loop
circuit (PLL). Using the Segment Sensor output as a reference signal the PLL
generates clock signal at ten times that frequency. This faster clock signal is used
by the PLD to make the Sample and Hold Circuits capture the signal during the
center portions of the detected waveform, ignore the rising and falling edges of the
detector signal.
P/N 04288 Rev: A
IR Beam Passing Through
MEASUREMENT cell of GFC Wheel
MEASUREMENT Cell of GFC Wheel
REFERENCE cell of GFC Wheel
REFERENCE cell of GFC Wheel
Sample & Hold
Active
Sample & Hold
Inactive
Figure 10-12: Sample & Hold Timing
THEORY OF OPERATION
Active When:
Segment Sensor Pulse is:
Detector
Output
HIGH
LOW
HIGH
LOW
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