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3.4.6
External memory expansion
By setting the port n mode control register (PMCn) to control mode, an external device can be connected to the
external memory space using each pin of ports DH, DL, CS, CT, and CM. Each register is set by selecting control
mode for each pin of these ports using PMCn (n = DH, DL, CS, CT, CM).
Note that the status after reset differs as shown below in accordance with the operating mode specification set by
pins MODE0 to MODE2 (refer to 3.3 Operation Modes for details of the operation modes).
(a) In the case of ROMless mode 0
Because each pin of ports DH, DL, CS, CT, and CM enters control mode following a reset, external
memory can be used without making changes to the port n mode control register (PMCn) (the external
data bus width is 16 bits).
(b) In the case of ROMless mode 1
Because each pin of ports DH, DL, CS, CT, and CM enters control mode following a reset, external
memory can be used without making changes to the port n mode control register (PMCn) (the external
data bus width is 8 bits).
(c) In the case of single-chip mode 0
Since the internal ROM area is accessed after a reset, each pin of ports DH, DL, CS, CT, and CM enters
the port mode, and external devices cannot be used.
To use external memory, set the port n mode control register (PMCn).
(d) In the case of single-chip mode 1
The internal ROM area is allocated from address 100000H. As a result, because each pin of ports DH,
DL, CS, CT, and CM enters control mode following a reset, external memory can be used without making
changes to the port n mode control register (PMCn) (the external data bus width is 16 bits).
Remark
n = DH, DL, CS, CT, CM
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CHAPTER 3 CPU FUNCTION
User's Manual U14492EJ3V0UD
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