Table of Contents
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Edition
2nd
Addition of Note and deletion of Caution in Figure 9-95 Cycle Measurement Operation
edition
Timing Example
Modification of Figure 9-97 Example of Timing During TM4 Operation
Modification of bit names in 9.5.4 (1) Timer control register 4 (TMC4)
Modification of Figure 9-98 TM4 Compare Operation Example
Addition of Caution and modification of bit names and bit descriptions in 10.2.3 (1)
Asynchronous serial interface mode register 0 (ASIM0)
Modification of description on bits that can be manipulated in 10.2.3 (2) Asynchronous
serial interface status register 0 (ASIS0)
Modification of bit names and addition of Caution in bit description in 10.2.3 (3)
Asynchronous serial interface transmission status register 0 (ASIF0)
Modification of description on bits that can be manipulated in 10.2.3 (4) Reception buffer
register 0 (RXB0)
Modification of description on bits that can be manipulated in 10.2.3 (5) Transmission
buffer register 0 (TXB0)
Addition and modification of description in 10.2.5 (3) Continuous transmission operation
Addition of Figure 10-4 Continuous Transmission Processing Flow
Addition of Note and modification of description in table in Figure 10-5 Continuous
Transmission Starting Procedure
Modification of description in table in Figure 10-6 Continuous Transmission End
Procedure
Addition of Caution in Figure 10-7 Asynchronous Serial Interface Reception Completion
Interrupt Timing
Modification of description on bits that can be manipulated and addition of Caution in
10.2.6 (2) (a) Clock selection register 0 (CKSR0)
Modification of description on bits that can be manipulated in 10.2.6 (2) (b) Baud rate
generator control register 0 (BRGC0)
Addition of baud rate item in Table 10-3 Baud Rate Generator Setting Data
Addition of (2) in 10.2.7 Precautions
Modification of bit names in 10.3.3 (1) Asynchronous serial interface mode registers 10,
20 (ASIM10, ASIM20)
Modification of bit names in 10.3.3 (3) Asynchronous serial interface status registers 1, 2
(ASIS1, ASIS2)
Modification of description on bits that can be manipulated in 10.3.3 (4)
continuous reception buffer registers 1, 2 (RXB1, RXB2)/reception buffer registers L1, L2
(RXBL1, RXBL2)
Addition of Caution in 10.3.4 (1) Reception completion interrupt (INTSRn)
Addition of 10.3.5 (3) Continuous transmission of 3 or more frames
Modification of bit names in 10.3.7 (2) (b)
PRSM2)
Modification of description on bits that can be manipulated in 10.3.7 (2) (c) Prescaler
compare registers 1, 2 (PRSCM1, PRSCM2)
Addition of 10.3.7 (3) Allowable baud rate range during reception
APPENDIX E REVISION HISTORY
Major Revision from Previous Edition
Prescaler mode registers 1, 2 (PRSM1,
User's Manual U14492EJ3V0UD
(5/10)
Applied to:
CHAPTER 9
TIMER/COUNTER
FUNCTION (REAL-
TIME PULSE UNIT)
CHAPTER 10
SERIAL
INTERFACE
FUNCTION
2-frame
827
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