NEC V850E/IA1 mPD703116 User Manual page 466

Figure 10-19. Asynchronous Serial Interface Reception Completion Interrupt Timing
RXDn (input)
INTSRn interrupt
Flag in reception
(SIRn)
RXDn (input)
INTSRn interrupt
Flag in reception
(SIRn)
RXDn (input)
INTSRn interrupt
Flag in reception
(SIRn)
Cautions 1. Even if a reception error occurs, be sure to read 2-frame continuous reception buffer
register n (RXBn)/reception buffer register n (RXBLn). If the RXBn or RXBLn register is not
read, an overrun error will occur at the next data reception, and the reception error state will
continue indefinitely.
2. Reception is always performed with the stop bit length set to 1 bit. A second stop bit is
ignored.
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CHAPTER 10 SERIAL INTERFACE FUNCTION
(a) When stop bit length = 1 bit
Start D0 D1 D2
(b) When stop bit length = 2 bits
Start D0 D1 D2
(c) In 2-frame continuous transmission mode
Start D0 D1 Parity Stop
1st frame
User's Manual U14492EJ3V0UD
D6 D7 Parity
D6 D7 Parity
Start D1 D5 D6
2nd frame
Stop
Stop
D7 Parity Stop