NEC V850E/IA1 mPD703116 User Manual page 455

32-bit single-chip microcontrollers
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[2-frame continuous reception buffer register 1]
15
14
13
12
RXB1
RXB15
RXB14
RXB13
RXB12
[Reception buffer register L1]
[2-frame continuous reception buffer register 2]
15
14
13
12
RXB2
RXB15
RXB14
RXB13
RXB12
[Reception buffer register L2]
Bit Position
Bit Name
15 to 0
RXB15 to
RXB0
(a) When 2-frame continuous reception is set
15
14
13
12
RXBn
RXB15
RXB14
RXB13
RXB12
7-/8-bit data of 1st frame
(b) When 9-bit extension reception is set
15
14
13
12
RXBn
RXB15
RXB14
RXB13
RXB12
When 9-bit extension is set, the extension bit (RXB8) is stored in the RB8 bit of the ASISn register
simultaneously with saving to the reception buffer.
CHAPTER 10 SERIAL INTERFACE FUNCTION
11
10
9
8
7
6
RXB11
RXB10
RXB9
RXB8
RXB7
RXB6
7
6
RXBL1
RXB7
RXB6
11
10
9
8
7
6
RXB11
RXB10
RXB9
RXB8
RXB7
RXB6
7
6
RXBL2
RXB7
RXB6
Stores receive data.
0 can be read for the RXBn register when 7, 8 bit/character data is received.
When an extension bit is set during 9 bit/character data reception, the extension bit
(RXB8) is stored in RB8 of the ASISn register simultaneously with saving to the
reception buffer.
0 can be read for the RXB7 bit of the RXBLn register during 7 bit/character data
reception.
11
10
9
8
7
RXB11
RXB10
RXB9
RXB8
RXB7
11
10
9
8
7
RXB11
RXB10
RXB9
RXB8
RXB7
User's Manual U14492EJ3V0UD
5
4
3
2
1
RXB5
RXB4
RXB3
RXB2
RXB1
RXB0
5
4
3
2
1
RXB5
RXB4
RXB3
RXB2
RXB1
RXB0
5
4
3
2
1
RXB5
RXB4
RXB3
RXB2
RXB1
RXB0
5
4
3
2
1
RXB5
RXB4
RXB3
RXB2
RXB1
RXB0
Function
6
5
4
3
2
1
RXB6
RXB5
RXB4
RXB3
RXB2
RXB1
7-/8-bit data of 2nd frame
6
5
4
3
2
1
RXB6
RXB5
RXB4
RXB3
RXB2
RXB1
9-bit extended data
0
Address
Initial value
FFFFFA20H
Undefined
0
Address
Initial value
FFFFFA22H
Undefined
0
Address
Initial value
FFFFFA40H
Undefined
0
Address
Initial value
FFFFFA42H
Undefined
0
RXB0
0
RXB0
455

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