Operation - NEC V850E/IA1 mPD703116 User Manual

32-bit single-chip microcontrollers

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CHAPTER 9 TIMER/COUNTER FUNCTION (REAL-TIME PULSE UNIT)

9.1.5 Operation

Remarks 1. In the description of the operation in 9.1.5, it is assumed that each bit that affects the output of

TO0n0 to TO0n5 is set as follows.

ALVTO = 1, ALVUB = 0, ALVVB = 0, ALVWB = 0, TORTOn = 0

2. F/F mentioned in 9.1.5 is a flip-flop that controls output of the TO0n0 to TO0n5 pins.

(1) Basic operation

Timer 0 (TM0n) is a 16-bit interval timer that operates as an up/down timer or as an up timer. The cycle is

controlled by compare register 0n3 (CM0n3) (n = 0, 1).

All TM0n bits are cleared (0) by RESET input and count operation is stopped.

Count operation enable/disable is controlled by the TM0CEn bit of timer control register 0n (TMC0n). The

count operation is started by setting the TM0CEn bit to 1 by software. Resetting the TM0CEn bit to 0 clears

TM0n and stops the count operation.

When the value of compare register 0n3 (CM0n3) set beforehand and the value of the TM0n counter match,

a match interrupt (INTCM0n3) is generated.

The count clock to TM0n can be selected from among 6 internal clocks with the TMC0n register. If the TM0n

has been set as an up/down timer, an underflow interrupt (INTTM0n) is generated when TM0n becomes

0000H during down counting.

The TM0n has the following three operation modes, which are selected with timer control register 0n

• PWM mode 0: Triangular wave modulation (Right-left symmetric waveform control)

• PWM mode 1: Triangular wave modulation (Right-left asymmetric waveform control)

• PWM mode 2: Sawtooth wave modulation control

TMC0n Register

Operation Mode

triangular wave)

triangular wave)

(sawtooth wave)

Setting prohibited

Caution Changing bits MOD01, MOD00 during TM0n operation (TM0CEn = 1) is prohibited.

Remark n = 0, 1

The various operation modes are described below.

Table 9-3. Timer 0 (TM0n) Operation Modes

User's Manual U14492EJ3V0UD

BFCMn2→ CM0n0 to

CM0n2 Timing