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CHAPTER 9 TIMER/COUNTER FUNCTION (REAL-TIME PULSE UNIT)
(3) Timer control register 31 (TMC31)
The TMC31 register controls the operation of TM3.
This register can be read/written in 8-bit or 1-bit units.
Cautions 1. Do not change the bits of the TMC31 register during timer operation. If they are to be
changed, they must be changed after setting the TM3CE bit of the TMC30 register to "0".
If the TMC31 register is overwritten during timer operation, the operation is not
guaranteed.
2. If the ENT1 bit and the ALV bit are changed simultaneously, a glitch (spike-shaped
noise) may be generated in the TO3 pin output. Either design the circuit that will not
malfunction even if a glitch is generated, or make sure that the ENT1 bit and the ALV bit
do not change at the same time.
3. TO3 output remains unchanged by external interrupt signals (INTP30, INTP31). When
using the TO3 signal, set the capture/compare register to the compare register (CMS1,
CMS0 bits of TMC31 register = 1).
Remarks 1. A reset takes precedence for the flip-flop of the TO3 output.
2. When the A/D converter is set to the timer trigger mode, the match interrupt of the compare
register becomes a start trigger for A/D conversion, and conversion begins. At this time, the
compare register match interrupt also functions as a compare register match interrupt for the
CPU. To prevent the generation of a compare register match interrupt for the CPU, disable
interrupts with the interrupt mask bits (CC3MK0, CC3MK1) of the interrupt control registers
(CC3IC0, CC3IC1).
386
User's Manual U14492EJ3V0UD
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