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CHAPTER 7 INTERRUPT/EXCEPTION PROCESSING FUNCTION
Bit Position
Bit Name
3, 2
IES1n11,
IES1n10
1, 0
IES1n01,
IES1n00
Remark n = 0, 1
Specifies the valid edge of the pin selected using the CSLn bit of the CSL1n register
(INTP1n1, INTP1n0).
IES1n11
IES1n10
0
0
0
1
1
0
1
1
Specifies the valid edge of the INTP100 and INTP110 pins.
IES1n01
IES1n00
0
0
0
1
1
0
1
1
User's Manual U14492EJ3V0UD
Function
Valid Edge
Falling edge
Rising edge
Setting prohibited
Both rising and falling edges
Valid Edge
Falling edge
Rising edge
Setting prohibited
Both rising and falling edges
(2/2)
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