NEC V850E/IA1 mPD703116 User Manual page 485

32-bit single-chip microcontrollers
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Figure 10-25. Block Diagram of Clocked Serial Interface
7
f
/2
XX
6
f
/2
XX
5
f
/2
XX
4
f
/2
XX
3
f
/2
XX
2
f
/2
XX
BRG3
SCKn
Transmission data control
SIn
Remarks 1. n = 0, 1
2. f
: Internal system clock
XX
CHAPTER 10 SERIAL INTERFACE FUNCTION
Serial clock controller
Clock start/stop control
Selector
clock phase control
Transmission control
Initial transmission
SO selection
buffer register
(SOTBFn/SOTBFLn)
Transmission
buffer register
(SOTBn/SOTBLn)
Shift register
(SIOn/SIOLn)
Reception buffer register
(SIRBn/SIRBLn)
User's Manual U14492EJ3V0UD
SCKn
&
Interrupt
INTCSIn
controller
Control signal
SOn
SO latch
485

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