NEC V850E/IA1 mPD703116 User Manual page 305

32-bit single-chip microcontrollers
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CHAPTER 9 TIMER/COUNTER FUNCTION (REAL-TIME PULSE UNIT)
(4) Capture/compare registers 100, 110 (CC100, CC110)
CC1n0 is a 16-bit register. It can be used as a capture register or as a compare register through specification
with capture/compare control register n (CCRn). CC1n0 can be read/written in 16-bit units.
Cautions 1. When used as a capture register (CMS0 bit of CCRn register = 0), write access from the
CPU is prohibited.
2. When used as a compare register (CMS0 bit of CCRn register = 1) and the TM1CEn bit of
the TMC1n register is "1", overwriting the CC1n0 register values is prohibited.
3. When the TM1CEn bit of the TMC1n register is "0", the capture trigger is disabled.
4. When the operation mode is changed from capture register to compare register, newly
set a compare value.
5. Continuous reading of CC1n0 is prohibited. If CC1n0 is continuously read, the second
read value may differ from the actual value. If CC1n0 must be read twice, be sure to read
another register between the first and the second read operation.
Correct usage example
CC100 read
CC110 read
CC100 read
CC110 read
Remark
n = 0, 1
15
14
13
12
CC100
15
14
13
12
CC110
(a) When set as a capture register
When CC1n0 is set as a capture register, the valid edge of the corresponding external interrupt INTP1n0
signal is detected as the capture trigger. TM1n latches the count value in synchronization with the
capture trigger (capture operation). The latched value is held in the capture register until the next capture
operation.
The valid edge of external interrupts (rising edge, falling edge, both edges) is selected with signal edge
selection register 1n (SESA1n).
When the CC1n0 register is specified as a capture register, interrupts are generated upon detection of
the valid edge of the INTP1n0 signal.
(b) When set as a compare register
When CC1n0 is set as a compare register, it always compares its own value with the value of TM1n. If
the value of CC1n0 matches the value of the TM1n, CC1n0 generates an interrupt signal (INTCC1n0).
11
10
9
8
7
6
11
10
9
8
7
6
User's Manual U14492EJ3V0UD
Incorrect usage example
CC100 read
CC100 read
CC110 read
CC110 read
5
4
3
2
1
0
5
4
3
2
1
0
Address
Initial value
FFFFF5E6H
0000H
Address
Initial value
FFFFF606H
0000H
305

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