Chapter 7 Interrupt/Exception Processing Function; Features - NEC V850E/IA1 mPD703116 User Manual

32-bit single-chip microcontrollers
Hide thumbs Also See for V850E/IA1 mPD703116:
Table of Contents

Advertisement

CHAPTER 7 INTERRUPT/EXCEPTION PROCESSING FUNCTION

The V850E/IA1 is provided with a dedicated interrupt controller (INTC) for interrupt servicing and can process a
total of 53 interrupt requests.
An interrupt is an event that occurs independently of program execution, and an exception is an event whose
occurrence is dependent on program execution.
The V850E/IA1 can process interrupt requests from the on-chip peripheral hardware and external sources.
Moreover, exception processing can be started by the TRAP instruction (software exception) or by generation of an
exception event (i.e. fetching of an illegal opcode) (exception trap).
Eight levels of software-programmable priorities can be specified for each interrupt request.
Interrupt servicing starts after no fewer than 4 system clocks (100 ns (@ 50 MHz)) following the generation of an
interrupt request.

7.1 Features

Interrupts
• Non-maskable interrupts: 1 source
• Maskable interrupts: 52 sources
• 8 levels of programmable priorities (maskable interrupts)
• Multiple interrupt control according to priority
• Masks can be specified for each maskable interrupt request.
• Noise elimination
Note For details of the noise eliminator, refer to 14.4 Noise Eliminator.
Exceptions
• Software exceptions: 32 sources
• Exception traps: 2 sources (illegal opcode exception and debug trap)
Interrupt/exception sources are listed in Table 7-1.
164
Note
, edge detection, and valid edge specification for external interrupt request signals.
User's Manual U14492EJ3V0UD

Advertisement

Table of Contents
loading

Table of Contents