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VIFB16 - 03/05
Bit number in
the object
(hexadecimal)
Object RIW x,0,0
Object RIW x,0,1
Object RIW x,0,2
Object RIW x,0,3
Fig. 4/13: Allocation of the valve terminal inputs and status bits to the
RIW objects
0506b
4. Commissioning
Addressing examples
Example 1 - Inputs
Addressing the inputs (sequential numbering at
the valve terminal).
Example 3.
F
E
D
C
B
15 14 13 12 11 10 9
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48
The addresses of the four status bits of the valve
terminal depend on the fitting of the input
modules (see Chapter 5.4 "Status Bits").
Concrete allocation see
A
9
8
7
6
8
7
6
5
4
3
2
1
5
4
3
2
1
4-35
0
0
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