VIFB16 - 03/05
Inputs
Addresses of status
bits (0...63)
None
No status bits
4
4, 5, 6, 7
8
12, 13, 14, 15
12
12, 13, 14, 15
16
20, 21, 22, 23
20
20, 21, 22, 23
24
28, 29, 30, 31
28
28, 29, 30, 31
32
36, 37, 38, 39
36
36, 37, 38, 39
40
44, 45, 46, 47
44
44, 45, 46, 47
48
52, 53, 54, 55
52
52, 53, 54, 55
56
60, 61, 62, 63
60
60, 61, 62, 63
*RIWx,0,(0..3)
Fig. 5/11: Position of the status bits
0506b
5. Diagnosis/error treatment
Position of status bits
The status bits occupy four addresses in the
address range of the inputs. The position of the
status bits follows those of the inputs.
word number
allways 0
field bus address
RIW word number
0
0
0
0
1
1
1
1
2
2
2
2
3
3
3
3
Example for field
bus address 7 *
RIW7,0,0,(4...7)
RIW7,0,0,(4...7)
RIW7,0,0,(C...F)
RIW7,0,0,(C...F)
RIW7,0,1,(4...7)
RIW7,0,1,(4...7)
RIW7,0,1,(C...F)
RIW7,0,1,(C...F)
RIW7,0,2,(4...7)
RIW7,0,2,(4...7)
RIW7,0,2,(C...F)
RIW7,0,2,(C...F)
RIW7,0,3,(4...7)
RIW7,0,3,(4...7)
RIW7,0,3,(C...F)
RIW7,0,3,(C...F)
5-13