Texas Instruments TMS320C3x User Manual page 671

Syntax
Operation
Operands
Opcode
Description
Cycles
Status Bits
Mode Bit
Example
SIGI
Signal interlocked operation.
Wait for interlock acknowledge.
Clear interlock.
None
31 24 23
0 0 0 1 0 1 1 0 0
An interlocked operation is signaled over XF0 and XF1. After the interlocked
operation is acknowledged, the interlocked operation ends. SIGI ignores the
external ready signals. Refer to Section 7.4, Interlocked Operations , on page
7-13 for detailed information.
1
LUF Unaffected
LV Unaffected
UF Unaffected
N Unaffected
Z Unaffected
V Unaffected
C Unaffected
OVM Operation is not affected by OVM bit value.
SIGI ; The processor sets XF0 to 0, idles
; until XF1 is set to 0, and then
; sets XF0 to 1.
16 15
0 0 0 0 0 0 0 0 0 0
Assembly Language Instructions
Signal, Interlocked
8 7
0 0 0 0 0 0 0 0 0 0 0 0 0
SIGI
0
13-213