Inactive Bus States For Strb And Mstrb - Texas Instruments TMS320C3x User Manual

Texas instruments computer hardware user's guide
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External Memory Interface Timing
Figure 9–25. Inactive Bus States for STRB and MSTRB
H3
H1
(M)STRB
(X)R/W
(X)A
Write data
(X)D
(X)RDY ignored
(X)RDY
Bus inactive
9-36

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