Texas Instruments TMS320C3x User Manual page 650

OR3||STI
Parallel OR3 and STI
Syntax
Operation
Operands
Opcode
Cycles
13-192
OR3 src2, src1, dst1
src3, dst2
|| STI
src1 OR src2 dst1
| src3 dst2
src1 register (R n 1, 0
src2 indirect ( disp = 0, 1, IR0, IR1)
dst1 register (R n 2, 0
src3 register (R n 3, 0
dst2 indirect ( disp = 0, 1, IR0, IR1)
This instruction's operands have been augmented in the following devices:
-
'C31 silicon revision 6.0 or greater
-
'C32 silicon revision 2.0 or greater
src1 register (R n 1, 0
src2 indirect ( disp = 0, 1, IR0, IR1) or any CPU register
dst1 register (R n 2, 0
src3 register (R n 3, 0
dst 2 indirect ( disp = 0, 1, IR0, IR1)
31 24 23
1 1 1 0 1 0 0 dst 1
A bitwise-logical OR and an integer store are performed in parallel. All registers
are read at the beginning and loaded at the end of the execute cycle. This
means that if one of the parallel operations (STI) reads from a register and the
operation being performed in parallel (OR3) writes to the same register, then STI
accepts the contents of the register as input before it is modified by the OR3.
If src2 and dst2 point to the same location, src2 is read before the write to dst2.
1
n 1
7)
n 2 7)
n 3
7)
n 1 7)
n 2 7)
n 3 7)
16 15
src 1 src 3 dst 2
8 7 0
src 2