LSH3
Logical Shift, 3-Operand
Example 2
13-140
LSH3 *–AR4(IR1),R5,R3
Before Instruction
R3
00 0000 0000
R5
00 12C0 0000
AR4
IR1
LUF
LV
UF
N
Z
V
C
Data memory
809904h
Note: Cycle Count
See Section 8.5.2, Data Loads and Stores , on page 8-24 for the effects of
operand ordering on the cycle count.
80 9908
4
0
0
0
0
0
0
0
–12
0FFFFFFF4
After Instruction
R3
00 0001 2C00
R5
00 12C0 0000
AR4
80 9908
IR1
LUF
LV
UF
N
Z
V
C
809904h
0FFFFFFF4
4
0
0
0
0
0
0
0
–12
Need help?
Do you have a question about the TMS320C3x and is the answer not in the manual?