Expansion-Bus Control Register; Expansion-Bus Control Register Bits - Texas Instruments TMS320C3x User Manual

9.3.2

Expansion-Bus Control Register

Figure 9–3. Expansion-Bus Control Register
31–16 15–12
xx
Notes: 1) xx = reserved bit, read as 0
2) R = read, W = write
Table 9–4. Expansion-Bus Control Register Bits
Abbreviation Reset Value
SWW
WTCNT
The expansion-bus control register is a 32-bit register that contains control bits
for the expansion bus (see Figure 9–3 and Table 9–4).
11–8
xx xx
Name
11 Software wait mode
111 Software wait mode
Note:
After changing the bit fields of the expansion-bus control register, up to three
instructions are fetched before the expansion bus is reconfigured because
the configuration change is performed in the execute stage of the pipeline.
TMS320C30 and TMS320C31 External-Memory Interface
Memory Interface Control Registers
7 6 5 4
WTCNT SWW
R/W R/W
Description
In conjunction with the WTCNT, 2-bit field
defines the mode of wait-state generation.
(See Table 9–5.)
This 3-bit field specifies the number of cycles
to use when in software wait mode for the
generation of internal wait state. The range is
0 (WTCNT = 0 0 0) to 7 (WTCNT = 1) H1/H3
cycles. (See Section 9.4.)
3 2 1 0
xx xx xx
9-9