Texas Instruments TMS320C3x User Manual page 477

Table 13–9. Parallel Instruction Set Summary (Continued)
(a) Parallel arithmetic with store instructions (Continued)
Mnemonic
SUBF3
|| STF
SUBI3
|| STI
XOR3
|| STI
(b) Parallel load instructions
Mnemonic
LDF
|| LDF
LDI
|| LDI
(c) Parallel multiply and add/subtract instructions
Mnemonic
MPYF3
|| ADDF3
MPYF3
|| SUBF3
MPYI3
|| ADDI3
MPYI3
|| SUBI3
count
Legend: register addr (R7–R0)
dst 1 register addr (R7–R0)
dst 2 indirect addr ( disp = 0, 1, IR0, IR1)
op1, op2, op4, and op5
Any two of these operands must be
specified using register addr; the remaining
two must be specified using indirect.
Description
Subtract floating-point value
Subtract integer
Bitwise-exclusive OR
Description
Load floating-point value
Load integer
Description
Multiply and add floating-point value
Multiply and subtract floating-point value
Multiply and add integer
Multiply and subtract integer
Parallel Instruction Set Summary
Operation
src 1 – src 2
src 3
||
src 1 – src 2
src 3
||
src 1 XOR src 2
src 3
||
Operation
src 2
|| src 4
src 2
src 4
||
Operation
op1 x op2
|| op4 + op5
op1 x op2
|| op4 – op5
op1 x op2
|| op4 + op5
op1 x op2
|| op4 – op5
op3 register addr (R0 or R1)
op6 register addr (R2 or R3)
src 1 register addr (R7–R0)
src 2 indirect addr ( disp = 0, 1, IR0, IR1)
src 3 register addr (R7–R0)
Assembly Language Instructions
dst 1
dst 2
dst 1
dst 2
dst 1
dst 2
dst 1
dst 2
dst 1
dst 2
op3
op6
op3
op6
op3
op6
op3
op6
13-19