Pipeline Operation - Texas Instruments TMS320C3x User Manual

Two characteristics of the'C3x that contribute to its high performance are:
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Pipelining
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Concurrent I/O and CPU operation
The following four functional units control 'C3x operation:
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Fetch
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Decode
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Read
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Execute
Pipelining is the overlapping or parallel operations of the fetch, decode, read,
and execute levels of a basic instruction.
The DMA controller decreases pipeline interference and enhances the CPU's
computational throughput by performing input/output operations.
Topic
8.1 Pipeline Structure
8.2 Pipeline Conflicts
8.3 Resolving Register Conflicts
8.4 Memory Access for Maximum Performance
8.5 Clocking Memory Accesses

Pipeline Operation

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Pipeline Operation
Chapter 8
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8-4
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8-1