Programmable Wait States
Table 10–3. Wait-State Generation
SWW Bit
Field
/RDYext
00
0
1
01
x
x
10
0
0
1
1
11
0
0
1
1
10-16
Inputs
/RDYwtcnt
x
x
0
1
0
1
0
1
0
1
0
1
Output
/RDYint
Functional Description
0
Wait until external RDY is signaled
1
0
Wait until internal wait state generator counts
down to 0
1
0
Wait until first signal: external RDY or the
internal wait state generator (logical OR)
0
0
1
0
Wait until both external RDY is signaled and
wait state generator counts down to 0 (logical
1
AND)
1
1
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