Texas Instruments TMS320C3x User Manual page 649

Example
Data memory
809804h
OR3 *++AR1(IR1),R2,R7
Before Instruction
R2
00 1256 0000
R7
00 0000 0000
AR1
80 9800
IR1
LUF
LV
UF
N
Z
V
C
2BCD
Note: Cycle Count
See subsection 8.5.2, Data Loads and Stores , on page 8-24 for the effects
of operand ordering on the cycle count.
Bitwise-Logical OR, 3-Operand
R2
R7
AR1
IR1
4
LUF
0
LV
0
UF
0
N
0
Z
0
V
0
C
0
809804h
Assembly Language Instructions
After Instruction
00 1256 0000
0 1256 2BCD
80 9804
4
0
0
0
0
0
0
0
2BCD
OR3
13-191